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16 byte parallel in / out memory module

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How to find on server: /warp phro_16byte_pipo_memory

avatar _Phrozenbit_
Level 25 : Expert Electrician
I couldn't stop building Redstone things so made another computer part :D

This is my take on a parallel in/out memory device that can hold up to 16 bytes of binary data. This probably isn't the fastest and most compact possible way to build it but it works. This device however is fully solid state, there are no moving parts (pistons) anywhere (I don't like pistons and they don't like me :P). You need to understand a bit of binary to play around with this device, if you plan on using this in your CPU design test it's suitability first before implementing. Feel free to also check out this buil on our server :D

Anyway this module takes in an 8 bit number, a 4 bit address and can save said 8 bit number to a register. Typically, a device like this is used in bigger Redstone CPU/Calculator/Arithmetic logic units. It's also a parallel in parallel out type of memory module meaning that the data input is parallel to every one of the 16 8 byte registers, and so is the output. I went with this design as I've always built memory modules this way and still do so because it makes looking up and saving data to registers is pretty easy and straightforward.

Address decoder

The type of address decoder I'm using is of the spatial type. This was new for me but was well worth the effort learning as it makes decoding addresses more easy. The way this works is tied to the layout of the 16 8 bit registers. They have been built in a row - column layout. There are a total of 16 8 bit registers so that means that addressing can be achieved using a 4 bit decoder.

The decoder actually isn't 4 bit but also is. There are 4 rows of registers, each row has 4 registers so you've got 4 x 4 = 16 bytes of memory. The spatial decoder actually has two 2 bit decoders, 2 bits for the rows, and 2 bits for the columns. A individual 2 bit decoder can address 4 things, 00(first column address), 01(second column address), 10 (third column address) and 11(fourth column address). This also works exactly for the row addresses. Combine the two and you have a 4 bit decoder, when using it you won't notice that the 4 bit decoder has been plit up in two 2 bit decoders. Bretty neat :D However, the benifit of this design comes to light when the need for an 8 bit decoder arises, try making a single 8 bit decoder instead of two 4 bit decoders!

How to operate using test control panel

First look at this image of the control panel.

I've boxed in the input levers at the letter A. This is where you enter your binary value. The lightest green lever within that box represents the least significant bit (the first bit of the byte). It can be any 8 bit value you want! You have to read your binary from right to left at the input levers!

Address selecting can be done with the 4 blue levers in the box I've named C. 0000 is the first address, 0001 is the second address and 0010 is the third address and so on. If you fist entered a 8 bit binary value at A and have selected an address at C, you can hit the button that's on the yellow block. This saves your value to the selected address :D

Once you have saved the 8 bit value, you can turn off the levers at A to clear the input. After saving, your value should appear at the display, this is the box I've named B. Again there's that lightest green color at the bottom, that's also indicating the least significant bit. So you have to read your binary value from bottom to top! (this is because of me not being bothered to convert the vertical output bus to a horizontal one)

Whenever you select another address, the register at that address imediatly sets it's containing value onto the ouput bus, meaning after selecting the address you'll imidiatly see it on the display. Here are a couple of example images.

Saved value 000 0001 to address 0000

Saved value 0000 0010 to address 0001

Saved value 0000 0011 to address 0010

Saved value 0000 0100 to address 0011

Saved value 0000 0101 to address 0100

Free to use and thanks for looking at my submission :D

The provided schematic is for minecraft version 1.12.2. You are free to use this in your own projects or use this build as a base for your own interpretation of a 16 byte parallel in/out memory module. If you use this device or have downloaded it and like it, please leave me a diamond :D I'd also appreciate a link back to this page if you use this memory in one of your own projects. Thanks <3
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