Published Jun 18th, 2022, 6/18/22 8:08 am
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Here again I upload a big machine.
This (enormous) machine is a 32*32bit multiplier. It takes two numbers in 32bit (0 to 8589934591) and multiply them together meaning that the output is technically a 64bit number. The operation takes only few seconds !
32bit is a bit much but this design aims at showing the possibility to extend it to really large number.
This is only a proof of concept but it might be useful in case of a 32 bit asynchronous redstone computer.
Explanation :
the multiplier is composed of a lot of adding units I designed myself (better one may exist somewhere else) to be vertically stackable and to have only 1 redstone tick of carry propagation [check the prismarine blocks lines].
Mathematically , with A = abcd (4bits) and B = uvwx (4bits) -> A*B = abcd (if x) + abcd0 (if w) + abcd00 (if v) + abdc000 (if u) meaning we only have to redirect the inputs A to the adders and enabling them if the corresponding bit of B is on (=1).
Technical goal :
- be quick (3-4 ticks / adder unit with 1 tick carry propagation => only few seconds for the multiplication) [be aware of lags]
- doesn't use sequential logic (I may build one later)
- 32bit inputs
- high vertical density
This (enormous) machine is a 32*32bit multiplier. It takes two numbers in 32bit (0 to 8589934591) and multiply them together meaning that the output is technically a 64bit number. The operation takes only few seconds !
32bit is a bit much but this design aims at showing the possibility to extend it to really large number.
This is only a proof of concept but it might be useful in case of a 32 bit asynchronous redstone computer.
Explanation :
the multiplier is composed of a lot of adding units I designed myself (better one may exist somewhere else) to be vertically stackable and to have only 1 redstone tick of carry propagation [check the prismarine blocks lines].
Mathematically , with A = abcd (4bits) and B = uvwx (4bits) -> A*B = abcd (if x) + abcd0 (if w) + abcd00 (if v) + abdc000 (if u) meaning we only have to redirect the inputs A to the adders and enabling them if the corresponding bit of B is on (=1).
Technical goal :
- be quick (3-4 ticks / adder unit with 1 tick carry propagation => only few seconds for the multiplication) [be aware of lags]
- doesn't use sequential logic (I may build one later)
- 32bit inputs
- high vertical density
Progress | 100% complete |
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