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PMC/Discussion All submission images broken? Help fix.
zaubara
• 03/17/2013 1:35 pm
• Level 36 : Artisan Ninja

I have the same problems Phrozenbit describes here in Austria.
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Communities/Redstone Redstone Computers [Official]
zaubara
• 10/26/2012 10:33 am
• Level 36 : Artisan Ninja

I ever wanted to build that too sometime But now that you're already building this, I'll use yours

Instead of the comparator, there's a much easier way to check for numbers >4:


You can simplify such functions (generally every logic table) using Karnaugh-Vein diagrams. The open source tool LogiSim (which I use to draw these schematics) does this job for you (I'll simplified it a bit more to match Minecraft's logic, in reality, the gate outputs are ORed, but in minecraft you can simply use a wired OR).
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Communities/Redstone Redstone Computers [Official]
zaubara
• 10/23/2012 5:39 pm
• Level 36 : Artisan Ninja

PhrozenbitWhen you have some spare time, could you draw me a logic diagram for a 4 bit greater than comparator circuit ? I'll credit you the whole Redstone device when it's built.


Sure!


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Communities/Redstone Redstone Computers [Official]
zaubara
• 10/23/2012 3:50 am
• Level 36 : Artisan Ninja

PhrozenbitIt's a nice compact comparator that's fast. It works good, and I can not build one myself . I've been trying to build only the 'greater than' part from your logic diagram for another project I'm experimenting on. I feel I miss out on some education on the subject of digital logic.. so it's giving me headaches at the moment


Please feel free to ask Shortly said, it compares the numbers bit-wise, but only the most significant bit that differs from the second number is decicive.


NoseJob for a CowboyI don't really want an internal function for multiplication. For one, I've already built the ALU and it would be a bitch to squeeze in. And for another thing, it would most likely slow down my clock when I get around to building program memory and a counter. My ALU can pull off a full ripple carry in 13 ticks btw. Sadly, my A > B detection for the comparator is extremely slow. When the MSB's A input goes high, it takes the comparator a full 36 ticks to negate the lesser B inputs. I'm pretty sure this will be the limiting factor when it comes to my clock speed.

But, I don't really care about performing multiplication being slow. As long as it's an algorithm my ALU can perform externally, with minimal modifications, I could honestly care less how many steps are required. I basically want it for the fun of writing the program, I don't care about the function itself all that much.


I think, the multiplier will not be the only speed limiting factor in my CPU, but I'll see when I put everything together. On the other hand, it's the slowest part of the ALU - but like it's done by some existing microcontrollers (which I take is inspiration), that have a HW-multiplier, I want to give the multiplication 2 CPU cycles to complete the operation. That way, I have the advantage of a HW-multiplier, which will always be faster than multiplying by software (regarding arrays etc, multiplication is an often used and crucial operation), but it does'nt slow down the rest of the ALU.
For the multiplier itself, there are some optimizations possible, like faster algorithms (Dadda tree, Booth) or faster instant-carry-adders.
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Communities/Redstone Redstone Computers [Official]
zaubara
• 10/19/2012 2:16 pm
• Level 36 : Artisan Ninja

PhrozenbitI will use a fixed 8 bit instruction set, the most significant nibble will be the ALU functions, and the least significant wil be the RAM adresses.

I just realized however, that most of the ALU functions won't even need a RAM address, only loading values in the ALU's temporary registers would require a RAM address, same as saving the ALU's output in RAM. The unconditional branch, and conditional branching where I use your magnitude comparator for require a program memory address, which is also going to be four bits. It seems I have some additional space left while calling an ALU function that processes the values in the temporary ALU registers.

I just use a 4 bit wide decoder for the function enablers on the ALU, and a 4 bit wide decoder on the RAM address / register controllers. I plan on making the program memory and it's data paths synchronous, and hook up its output directly to the function decoders and RAM address decoders. Iterating through the program memory using a binary counter with branching capability hooked up to the program memory's address decoder should take care of running a program.


Thanks for explaining this Does the IS also support constants (4 bit)?
I am glad my work is useful for your creations, that keeps the motivation to continue


NoseJob for a CowboySpeaking of which, I've officially started on Project XENON, which is the codename of my new computer. The title pays homage to the Xbox 360 console, which uses a custom CPU designed by IBM, which is named Xenon.

So far, all I've built is a full 16-bit comparator and one bit of the rest of the ALU. Kind of put the kabosh on it after that. It's irritating building the same thing over and over again. I'll probably start a project page on it tomorrow.


It's impressive your doing that without the help of an editor, this must be a real challenge sometimes...
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Communities/Redstone Redstone Computers [Official]
zaubara
• 10/18/2012 1:13 pm
• Level 36 : Artisan Ninja

Hi, I just stumbled upon this thread

In your instruction set, you're only using 8 bit wide instructions, or do you have a variable size? If so, how exactly do you have solved this?
In my set, I use a fixed width of 32 bits, but I also have instructions that would easily fit into 8 bit, but then i would need some precaching logic...

regards
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