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Hey guys, This is a Redstone computer I'm building.
Download the components ( they all use 8-bit interfaces in little endian )
4-byte Registers Page (Download now)
Programming Terminal (Download now)
Read/Write Hard-Drive (Download now)
The Machine architecture
White wool represents that the Redstone above it is related to data busing or manipulation.
Black wool represents that the Redstone above it is directly connected to control components.
The Instruction-set architecture
-Machine Instruction word (byte)
Opcodes
EXECUTE
Operands [I][I][I][I][O][O][O][O]
I -opcode selector (nibble)
O -operand data (nibble)
-[b]ALU[/b] (nibble)
Opcodes
NOR,ADD,SUB,OR,XOR,AND,COMPARE
Operands [A][A][B][B]
A -source register selector
B -second source as well as destination register selector
-[b]PC[/b] (nibble)
Opcodes
BRANCH
Operands [C][C][A][A]
C -branching condition (Unconditionally,if-equal,if-not-equal,if-lower-than,if-greater-than)
A -source register selector for branch address.
-[b]ROM [/b](nibble)
Opcodes
Immediate value into Lower or Higher half of register A
Operands [D][D][D][D]
D -data
-[b]RAM [/b](nibble)
Opcodes
Load,Store
Operands [A][A][B][B]
A -Data register address
B -Address register address
[h3]Additional Notes[/h3][color=rgb(102,102,102)]Feed back is very welcome.[/color]..
Thanks again guys!
Download the components ( they all use 8-bit interfaces in little endian )
4-byte Registers Page (Download now)
Programming Terminal (Download now)
Read/Write Hard-Drive (Download now)
The Machine architecture
White wool represents that the Redstone above it is related to data busing or manipulation.
Black wool represents that the Redstone above it is directly connected to control components.
The Instruction-set architecture
-Machine Instruction word (byte)
Opcodes
EXECUTE
Operands [I][I][I][I][O][O][O][O]
I -opcode selector (nibble)
O -operand data (nibble)
-[b]ALU[/b] (nibble)
Opcodes
NOR,ADD,SUB,OR,XOR,AND,COMPARE
Operands [A][A][B][B]
A -source register selector
B -second source as well as destination register selector
-[b]PC[/b] (nibble)
Opcodes
BRANCH
Operands [C][C][A][A]
C -branching condition (Unconditionally,if-equal,if-not-equal,if-lower-than,if-greater-than)
A -source register selector for branch address.
-[b]ROM [/b](nibble)
Opcodes
Immediate value into Lower or Higher half of register A
Operands [D][D][D][D]
D -data
-[b]RAM [/b](nibble)
Opcodes
Load,Store
Operands [A][A][B][B]
A -Data register address
B -Address register address
[h3]Additional Notes[/h3][color=rgb(102,102,102)]Feed back is very welcome.[/color]..
Thanks again guys!
| Progress | 60% complete |
| Tags |
1 Update Logs
Update #1 : by RevolutionalRedStone 01/02/2012 8:24:17 pmJan 2nd, 2012
hey guys,
I invented a cool new type of keyboard, so i decided to add a couple to the j400, and i added a 2 hexidecimal screens which worked... brilliantly : )
And oh yeah, as part of my work on the super-fast piston harddrive, ive designed a prototype codenamed 'capacity' which it ironically doent have much of . for a piston tape that is, but as fast as pure redstone memory is concerned it is very efficiant .
inprogress - a control bus from the HDdrive too the cpu : )
Thanks again guys, keep an eye out for lots more cool stuff
I invented a cool new type of keyboard, so i decided to add a couple to the j400, and i added a 2 hexidecimal screens which worked... brilliantly : )
And oh yeah, as part of my work on the super-fast piston harddrive, ive designed a prototype codenamed 'capacity' which it ironically doent have much of . for a piston tape that is, but as fast as pure redstone memory is concerned it is very efficiant .
inprogress - a control bus from the HDdrive too the cpu : )
Thanks again guys, keep an eye out for lots more cool stuff
tools/tracking
383752
2
j400-processor
NoahzArkade
lissajonees
ScotsMiser
sniffercraft34
Escapazition
Bertoxx
Smugi
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Unfortunately, all component download links are broken :S Is you design already completed? (I mean, listing of possible opcodes, amount of registers, ROM, and RAM). I assume you use 8 bit registers and an 8 bit address space (16 would be possible, but that's very time-consuming to build in MineCraft even with tools like MCEdit). It would be awesome to see this machine in operation once it is completed :)
Also, what does you compare instruction exactly do? Do you have a status register with zero and overflow flags to compare numbers on equality and greater/smaller than? Or does it perform a bit test on two numbers?
In some of the screenshots, you can see the type memory you used in your device, but it can only, as far as I can see, push in one direction. What if you want to access a byte before the previous selected byte? Do you have to push the type all round? That is not very efficient when you have to wait multiple cycles till the memory type is pushed around. If you use that as a HDD, it doesn't matter that much whether it can push in both directions, but using that as your main RAM memory would be rather slow and inefficient don't you think?
All my projects are well out of date ( including the DL links ); i will be revamping and updating them all soon.
The processor is completed in that it can execute all of it's instructions, however the basic version of the programming terminal shown here does not include the 8-bit instruction set decoder and so it must instead be manually programmed using the less-dense 16-bit microcode instruction set.
Compare stores the result of a comparison between two registers..
Data about the comparison ( A was = to B, A was > than BÃ ect..) is stored until the next comparison.
This data can be accessed by calling the branch instruction specifying the relevant condition.
( just as you suspected )
The piston tape-drive ( tho placed where RAM is supposed to be ) was never supposed to act as random access memory, instead it would rotate itself to a user defined address before reading a big chunk of memory likely containing a program into the separate faster RAM ( the same way an electrical computer loads programs into memory when they are started )
Unfortunately at that point i became obsessed with producing perfect RAM, i built endless designs; and as well it was right at the turning point of instant piston technology. i was more than interested and my J-series of processors payed the price in neglect; i would spend the next 4-6 months exploring the world of glitch-tech, producing things like this
and this.
The next computer i built was a 1-bit stream CPU with Xenosys
( it came much further than is shown there ) and the very next thing i did was start working on the X series with my focus now shifting away from computability ( as i had found a dense MIPS like instruction set design works great in MC ) and was now moving towards practicality, optimization and larger memory banks.
Thanks for the post : )
Some time ago, I was also trying to create tape RAM, but that would become random access memory pushable in both directions. I had a program counter that keeped track at what position the tape was and a comparator that told the device how many blocks and in what direction it had to push. Unfortunately, the server crashed and most chunks were corrupted, so that project is considered dead now.
You said that one can program using a program terminal; how does that exactly work? Do you have to poke every instruction into memory or can you use microcode or assembly instructions to store instruction into memory?
There's one thing I forgot to mention in my previous post: does your processor support interrupts? Do you have a interrupt vector table your processor uses to jump to a specific interrupt handler or do you have a interrupt flag in some register you can use with e.g. a branch on interrupt instruction?
Just another suggestion, because you said your processor already has a full operational ISA, you could post a list of registers one can use and a ISA table one can use to write programs on your Redstone Device ;).
Classification ( Determine if an input lies within some class of inputs )
and Generation ( Produce some output )
When a computer system is capable of classifying all of it's possible inputs and generating all of it's possible outputs something amazing happens.
The system becomes 'complete' and 'universal' ( as in Turing complete and as in computationally universal )
At this point the computer is exactly as capable as ( tho possibly slower than ) the most powerful computer which could ever be made.
Most people will never truly grasp this concept; I didn't, even after 10 years of engineering and programming, later and while studying the related Lambda Calculus it clicked.
I wish i could explain it in a way which everyone could understand.